What compiler writers/chip architects might want to know about Graphics Processors

When: 
Thursday, January 18, 2007 - 6:00pm
Lecturer(s): 
Norm Rubin, Compiler Architect AMD/ATI

Joint meeting of IEEE Computer Society and GBC/ACM

This talk will be a broad overview of the application space and common programming model for graphics processing unit (GPU) architectures. Generally gpu design has always proceeded in stealth mode: Instruction sets are proprietary, chip architecture changes radically, and complex innovations are hidden under the covers. The market accepts this because gpu processors have consistently improved performance faster than Moore's law (doubling in less then one year). This talk will offer some suggestions about why innovation in cpu design does not proceed at the same pace. As examples of gpu chips, we will describe some of the details of two widely used graphics processors, the Xbox 360 console, and the X1900 desktop. The talk will include a quick introduction to CTM (Close-to-the-metal), which is a novel software system for general data level parallel computing on gpu archictures. CTM is the first tool that allows a developer to see the actual graphics Instruction Set Architecture (ISA). It is possible for a researcher using CTM to program numeric problems without extensive graphics knowledge. Finally the talk will show some performance data. The talk does not assume any prior knowledge of computer graphics.

Lecturer Biography: 

Norm Rubin has over twenty years experience delivering commercial compilers for processors ranging from embedded (ARM), desktop (HP, ALPHA) and supercomputer (KSR), and is a recognized expert in the field. For the last five years, he has been architecting compilers for ATI, one of the world's largest vendors of graphics chips. Norm holds a PhD from the Courant Institute of NYU. Besides his work in compilers, he is well known for his work in related parts of the tool chain, binary translators and dynamic optimizers.